module doors(A, B, NotGate, AndGate, OrGate, NandGate,NorGate,XorGate,LedNotGate, LedAndGate, LedOrGate, LedNandGate,LedNorGate,LedXorGate);
 input A;
 input B;
 output NotGate;
 output AndGate;
 output OrGate;
 output NandGate;
 output NorGate;
 output XorGate;
 output LedNotGate;
 output LedAndGate;
 output LedOrGate;
 output LedNandGate;
 output LedNorGate;
 output LedXorGate;
 
 assign NotGate = ~A;
 assign AndGate = A & B;
 assign OrGate = A | B;
 assign NandGate = ~(A & B);
 assign NorGate = ~(A | B);
 assign XorGate = A ^ B;
 
 assign LedNotGate = ~NotGate;
 assign LedAndGate = ~AndGate;
 assign LedOrGate = ~OrGate;
 assign LedNandGate = ~NandGate;
 assign LedNorGate = ~NorGate;
 assign LedXorGate = ~XorGate;
endmodule